ASIC Design Verification Engineer – Emulation
Cisco · Bengaluru
| Company | Cisco |
|---|---|
| Role | ASIC Design Verification Engineer – Emulation |
| Location | Bengaluru |
| Work mode | On-site |
| Experience | 6+ years |
| Job type | Full-time |
About this job
Cisco is hiring an ASIC Design Verification Engineer in Bengaluru who specialises in emulation. You will plan and run verification to prove that complex chip designs work correctly and perform well.
The main focus is emulation platforms that speed up verification and raise coverage. You will build test benches, run large tests, debug design issues with designers and improve verification automation. Mentoring junior engineers is part of the role. It is in the office.
Eligibility
- Bachelor's with 7+ years, master's with 4+, or PhD with 1+ year of related work
- Strong design verification and test methodology
- Hardware emulation platforms and flows
- UVM or OVM test bench development
- Debugging design bugs with design teams
Skills required
What you will do
- Write verification plans and test benches
- Run large-scale tests on emulation platforms
- Analyse results and debug design issues
- Improve verification infrastructure and automation
- Document tests and mentor junior engineers
How to apply
- Open the official Cisco job page with the Apply button and submit your application there.
- Tailor your resume to chips you verified, emulation flows you built and bugs you caught before tape-out.
Before the interview, prepare:
- UVM: agents, sequences, scoreboards and the phases
- Emulation vs simulation: when each is used
- Functional coverage and closing coverage holes
- Debugging a failing test from waveforms
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